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Figure 25.5. ADC Bias Programming
Reference
Current
BIASPROG
HALFBIAS
COMPBIAS
Internal
bandgap
reference
ADC
Com parator
The minimum value of the BIASPROG and COMPBIAS bitfields of the ADCn_BIASPROG register
(i.e. BIASPROG=0b0000, COMPBIAS=0b0000) represent the minimum bias currents. Similarly
BIASPROG=0b1111 and COMPBIAS=0b1111 represent the maximum bias currents. Additionally, the
bias current defined by the BIASPROG setting can be halved by setting the HALFBIAS bit of the
ADCn_BIASPROG register.
The bias current settings should only be changed while the ADC is disabled.
25.3.7 ADC Modes
The ADC contains two separate programmable modes, one single sample mode and one scan mode.
Both modes have separate configuration and result registers and can be set up to run only once per
trigger or repetitively. The scan mode has priority over the single sample mode. However, if scan
sequence is running, a triggered single sample will be interleaved between two scan samples.
25.3.7.1 Single Sample Mode
The single sample mode can be used to convert a single sample either once per trigger or repetitively.
The configuration of the single sample mode is done in the ADCn_SINGLECTRL register and the
results are found in the ADCn_SINGLEDATA register. The SINGLEDV bit in ADCn_STATUS is set
high when there is valid data in the result register and is cleared when the data is read. The single
mode results can also be read through ADCn_SINGLEDATAP without SINGLEDV being cleared. DIFF
in ADCn_SINGLECTRL selects whether differential or single ended inputs are used and INPUTSEL
selects input pin(s).
25.3.7.2 Scan mode
The scan mode is used to perform sweeps of the inputs. The configuration of the scan sequence is done
in the ADCn_SCANCTRL register and the results are found in the ADCn_SCANDATA register. The
SCANDV bit in ADCn_STATUS is set high when there is valid data in the result register and is cleared
when the data is read. The scan mode results can also be read through ADCn_SCANDATAP without
SCANDV being cleared. The inputs included in the sequence are defined by a the mask in INPUTMASK
in ADCn_SCANCTRL. When the scan sequence is triggered, the sequence samples all inputs that are
included in the mask, starting at the lowest pin number. DIFF in ADCn_SCANCTRL selects whether
single ended or differential inputs are used.
25.3.7.3 Conversion Tailgating
The scan sequence has priority over the single sample mode. However, a scan trigger will not interrupt
in the middle of a single conversion. If a scan sequence is triggered by a timer on a periodic basis,
single sample just before a scan trigger can delay the start of the scan sequence, thus causing jitter in
sample rate. To solve this, conversion tailgating can be chosen by setting TAILGATE in ADCn_CTRL.
When this bit is set, any triggered single samples will wait for the next scan sequence to finish before
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